Transistor spacer etch pinpoint structure

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257335, 257368, 257408, H01L 2976, H01L 2994, H01L 31062

Patent

active

055214118

ABSTRACT:
A method is provided for forming a transistor spacer etch endpoint structure of an integrated circuit, and an integrated circuit formed according to the same. A gate is formed over a portion of a substrate. A dielectric layer is formed over the integrated circuit and an oxide layer is formed over the dielectric layer. the oxide layer is patterned and etched to form sidewall oxide spacers on each side of the gate and over a portion of the dielectric layer. The dielectric layer not covered by the sidewall oxide spacers is then removed.

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IBM Technical Disclosure Bulletin vol. 24, No. 2, Jul. 1981 "Method to Improve The Controllability of Lightly Doped Drain SiO.sub.2 Spacer Formation", P. J. Tsang.
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