Method for fabricating MOSFET having increased effective gate le

Details Method for fabricating MOSFET having increased effective gate le Method for fabricating MOSFET having increased effective gate le

1998-06-10

1999-10-26

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438297, 438303, H01L 21265

Patent

active

059727543

ABSTRACT:
A process for fabricating a semiconductor device comprising a source, a drain, and a gate electrode having an increased effective gate length. A semiconductor device is fabricated by a process comprising the following steps: forming active areas separated by field oxide regions; forming a lightly doped region in each active area; forming a heavily doped p-Si (or a-Si) layer; depositing and patterning several dielectric layers to form a gate area surrounded by vertical spacers; forming a groove in the gate area and the substrate; forming a gate oxide layer in the groove and driving dopants in the doped p-Si (or a-Si) layer into the substrate to form the source and the drain; and forming a gate electrode in the groove.

REFERENCES:
patent: 5160491 (1992-11-01), Mori
patent: 5362665 (1994-11-01), Lu
patent: 5371024 (1994-12-01), Hieda et al.
patent: 5587340 (1996-12-01), Yamazaki
patent: 5672524 (1997-09-01), Liu et al.

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