Static random access memory for gate array devices

Static information storage and retrieval – Systems using particular element – Flip-flop

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365156, G11C 1100

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active

054385385

ABSTRACT:
A gate array device (10) includes a plurality of static random access memory cells (11). Each memory cell (11) comprises n-channel pass gate transistors (12, 14), n-channel drive transistors (16, 18), and p-channel transistors (20, 22). All transistors within the memory cell (11) are approximately of the same size. A resistance element (23) connects to the p-channel transistors (20, 22) in each memory cell (11), generating a new supply voltage (V.sub.cr ). The resistance element (23) effectively reduces the size of the p-channel transistors (20, 22) to below the size of the drive transistors (16, 18). By effectively reducing the size of the p-channel transistors (20, 22), the speed, accuracy, and stability of the memory cell (11) are enhanced despite the similar sizes of the transistors in the gate array device (10).

REFERENCES:
patent: 3936811 (1976-02-01), Horninger
patent: 3969708 (1976-07-01), Sonoda
patent: 4128773 (1978-12-01), Troutman
patent: 4460978 (1984-07-01), Jiang
patent: 4636983 (1987-01-01), Young

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