Static information storage and retrieval – Systems using particular element – Flip-flop
Patent
1994-09-26
1995-08-01
Popek, Joseph A.
Static information storage and retrieval
Systems using particular element
Flip-flop
365156, G11C 1100
Patent
active
054385385
ABSTRACT:
A gate array device (10) includes a plurality of static random access memory cells (11). Each memory cell (11) comprises n-channel pass gate transistors (12, 14), n-channel drive transistors (16, 18), and p-channel transistors (20, 22). All transistors within the memory cell (11) are approximately of the same size. A resistance element (23) connects to the p-channel transistors (20, 22) in each memory cell (11), generating a new supply voltage (V.sub.cr ). The resistance element (23) effectively reduces the size of the p-channel transistors (20, 22) to below the size of the drive transistors (16, 18). By effectively reducing the size of the p-channel transistors (20, 22), the speed, accuracy, and stability of the memory cell (11) are enhanced despite the similar sizes of the transistors in the gate array device (10).
REFERENCES:
patent: 3936811 (1976-02-01), Horninger
patent: 3969708 (1976-07-01), Sonoda
patent: 4128773 (1978-12-01), Troutman
patent: 4460978 (1984-07-01), Jiang
patent: 4636983 (1987-01-01), Young
Crane John D.
Donaldson Richard L.
Kesterson James C.
Popek Joseph A.
Texas Instruments Incorporated
LandOfFree
Static random access memory for gate array devices does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Static random access memory for gate array devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Static random access memory for gate array devices will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-738076