Memory circuit with auto redundancy

Static information storage and retrieval – Read/write circuit – Bad bit

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Details

36518509, 3652257, G11C 700

Patent

active

059599090

ABSTRACT:
A memory circuit with auto redundancy, offers the user to repair the defective memory by auto redundancy. The present invention implicates a counter to count the times of the programming verify loop. The user can set the times of the programming verify loop less then the prior art's. When the setting times of the programming verify loop are achieved, the memory cells enable the redundancy cells automatically. Moreover, this invention can use the EPROM, EEPROM and Flash Cells to be the fuse directly to store the address data. So this invention will be more convenience for user to repair the defective memory, and reduce the recording process efficiently.

REFERENCES:
patent: 5359560 (1994-10-01), Suh et al.
patent: 5528540 (1996-06-01), Shibata et al.
patent: 5657280 (1997-08-01), Shin et al.
patent: 5659510 (1997-08-01), Kwon et al.
patent: 5798974 (1998-08-01), Yamagata

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