SRAM cell with balanced load resistors

Details SRAM cell with balanced load resistors SRAM cell with balanced load resistors

1995-03-28

1997-04-29

Jackson, Jr., Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257369, 257536, 257904, 257919, 365148, 365188, H01L 2711

Patent

active

056252153

ABSTRACT:
SRAM cells are manufactured with balanced, high-resistance load resistances by having substantially all of dielectric layer directly over the polysilicon load resistor covered by a metal layer. The metal layer protects the polysilicon during subsequent processing which can adversely alter its characteristics.

REFERENCES:
patent: 3539839 (1970-11-01), Igarashi
patent: 4641173 (1987-02-01), Malhi et al.
patent: 4841481 (1989-06-01), Ikeda et al.
patent: 4853894 (1989-08-01), Yamanska et al.
patent: 5081515 (1992-01-01), Murata et al.
patent: 5172202 (1992-12-01), Kazuo
Y. Kohno et al, "A 14-ns 1-Mbit CMOS SRAM with Variable Bit Organization", IEEE Journal of Solid-State Circuits, vol. 23, No. 5, Oct. 1988, pp. 1060-1066.
European Search REport EP 93 30 9228.
International Search Report PCT/JP89/00433.

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