Structure for deselective broken select lines in memory arrays

Static information storage and retrieval – Read/write circuit – Bad bit

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365 63, 365 72, G11C 700

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active

RE0363197

ABSTRACT:
According to the present invention, a structure for holding broken select lines in a memory array deselected addresses the prior art problems associated with floating broken select lines, such as standby current and disruption of attached memory cells. The structure is a high impedance device which is placed on the end of select lines so that if a select line is broken during fabrication, the high impedance device, will hold the broken end of the select line to the desired deselect voltage. Select lines which have a driver at one end only and are broken during fabrication, but have the high impedance device on the other end, are not allowed to float. The high impedance device is also suitable for select lines which are not broken and previously were anchored at just one end. Suitable high impedance devices include a reverse biased diode, a weak transistor, a poly R memory cell load device, and an ON or OFF TFT memory cell load device.

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Patent Abstracts of Japan, vol. 009, No. 141 (p. 364), Jun. 15, 1995, JP 60 020397A (Toshiba KK).
"Simplified Static Column Decoder for CMOS Memory Bit Switches" IBM Technical Disclosure Bulletin, vol. 29, No. 8, Jan. 1987, pp. 3410-3411.

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