Enhanced ESD protection circuitry

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257361, H01L 2362

Patent

active

058982051

ABSTRACT:
An apparatus and method are disclosed for enhancing the operation of ESD protective circuits in a VLSI chip, having first and second CMOS devices therein which prevent damage due to ESD events, the first device being connected between a Vss contact and an I/O Pad contact and the second device being connected between a Vcc contact and the I/O Pad contact, and including diffusions in the chip that form a first diode which turns ON when negative ESD stresses develops between one of the first and second contacts and the I/O Pad contact, and which form a NPN transistor and a second diode that turn ON when positive ESD stresses develop between one of the first and second contacts and the I/O Pad contact, and additionally having the Vss and Vcc sources capacitively coupled.

REFERENCES:
patent: 5491358 (1996-02-01), Miyata
patent: 5543650 (1996-08-01), Au et al.

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