Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-06-26
2000-08-01
Brown, Peter Toby
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438410, 438439, 438448, 438770, 438225, 148DIG116, 148DIG117, H01L 218238
Patent
active
060966130
ABSTRACT:
The present invention proposes a method for fabricating field oxide regions for isolation by an improved poly-buffered local oxidation of silicon (PBLOCOS) process. A polysilicon layer is utilized to reduce the bird's beak, and a thin thermal oxide film is formed on the buffered polysilicon film to prevent pitting formation. Forming a thin pad oxide and a silicon layer, a thermal oxidation is carried out to grow another pad oxide on the silicon layer and crystallize the silicon into polysilicon. The buffered layer of stacked oxide-polysilicon-oxide layer is thus formed. The silicon nitride layer is then deposited on the stacked buffered layer and the active areas are defined. A thermal oxidation is now performed, and thick field oxide regions are grown. After the masking nitride layer and the stacked buffered layer are stripped, the MOS devices are fabricated, and thus complete the present invention.
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Acer Semiconductor Manufacturing Inc.
Brown Peter Toby
Pham Long
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