Method of making transistor with selectively doped channel regio

Details Method of making transistor with selectively doped channel regio Method of making transistor with selectively doped channel regio

1997-11-01

2000-08-01

Nguyen, Tuan H.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438217, H01L 21336

Patent

active

060965886

ABSTRACT:
A method of making an IGFET with a selected threshold voltage is disclosed. The method includes providing a semiconductor substrate with a device region that includes a source region, a drain region and a channel region therebetween, forming a gate over the channel region, introducing a threshold adjust dopant into the channel region after forming the gate without transferring essentially any of the threshold adjust dopant through the gate, thereby adjusting a threshold voltage of the IGFET, and forming a source in the source region and a drain in the drain region. Preferably, the threshold adjust dopant is introduced by implanting the threshold adjust dopant into the source region and diffusing the threshold adjust dopant from the source region into the channel region before providing any source/drain doping. The invention is well-suited for adjusting the threshold voltage, and therefore the drive current, leakage current and speed, of selected IGFETs, so that the fastest IGFETs with the highest leakage currents can be placed in critical speed paths such the tag to an instruction cache.

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