Semiconductor device and a method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257401, 257369, 257408, 257900, H01L 2701

Patent

active

059659190

ABSTRACT:
A CMOS device is disclosed in which p-channel and n-channel MOS transistors are formed on the same substrate. Each of the MOS transistors has a gate insulating layer formed on the substrate; a gate having a gate body and a spacer formed on both sidewalls of the gate body; a drain region of a first conductivity type formed in the substrate and beneath the gate body; a channel region of a second conductivity type formed at both sides of the first heavily doped impurity region and beneath the spacer; and a source region of the first conductivity type formed in the substrate and between the channel region and the device isolating region. With this CMOS device, the channel length can be controlled to about 0.1 mm and less and hot-carrier effect can be minimized.

REFERENCES:
patent: 4037308 (1977-07-01), Smith
patent: 4729002 (1988-03-01), Yamazaki
patent: 5225703 (1993-07-01), Nakatani
patent: 5670822 (1997-09-01), Jang

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