Method of replacing epitaxial wafers in CMOS process

Details Method of replacing epitaxial wafers in CMOS process Method of replacing epitaxial wafers in CMOS process

1997-12-19

2000-08-22

Elms, Richard

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438301, 438305, H01L 21336

Patent

active

061071463

ABSTRACT:
A method of utilizing a non-epitaxial starting material in a CMOS semiconductor fabrication process. A bulk impurity distribution is non-selectively introduced into the starting material. The starting material includes a substantially uniformly doped wafer having a sheet resistivity in the range of approximately 5 to 25 .OMEGA.-cm. An upper boundary of the bulk impurity distribution is displaced below an upper surface of the wafer by a first depth. A peak impurity concentration of the bulk impurity distribution is greater than approximately 1.times.10.sup.19 atom/cm.sup.3. Thereafter, a barrier impurity distribution is introduced into the wafer. A peak concentration of the barrier impurity distribution is displaced below the upper surface of the wafer by a second depth. The first depth is greater than the second depth such that the barrier impurity distribution may substantially prevent the bulk impurity distribution from migrating into the upper region of the wafer. Accordingly, the wafer of the present invention comprises a lightly doped upper region over a heavily doped bulk region. The bulk layer improves latchup immunity of the CMOS integrated circuit process by providing a conductive path below the upper region.

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