Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-01-26
2000-08-22
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438276, 438526, H01L 218246
Patent
active
061071269
ABSTRACT:
A method for fabricating a Read Only Memory, (ROM), cell on a semiconductor substrate with device region and programmable cell region. The method includes the followed step. A plurality of field oxide regions is formed on the semiconductor substrate. A P-well and an N-well are formed in the device region of the semiconductor substrate, a P-well is formed in the programmable cell region of the substrate. A photoresist is formed over the N-well in the device region. Next, a phosphorus ion implantation is performed into the P-well in the device region for anti-punchthrough and into the N-well in the programmable region to form buried channel by using the photoresist layer as implant mask. After removing the photoresisit, a CMOS transistor is formed on the device region, and a NMOS transistor is formed on the programmable cell region.
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patent: 5514610 (1996-05-01), Wann et al.
patent: 5635415 (1997-06-01), Hong
patent: 5830795 (1998-11-01), Mehta et al.
Chaudhari Chandra
Texas Instruments--Acer Incorporated
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