Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-05-27
2000-10-17
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
428253, 428396, 428397, 428964, H01L 218242, H01L 2120
Patent
active
061330906
ABSTRACT:
A method of fabricating a capacitor. A transistor is formed on a substrate. The transistor comprises a gate and a source/drain region. A dielectric layer is formed over the substrate. A covering layer is formed on the dielectric layer. Portions of the covering layer and the dielectric layer are removed to form a contact opening. The contact opening exposes a portion of the source/drain region. A polysilicon layer is formed over the substrate to fill the contact opening. The polysilicon layer is electrically coupled with the source/drain region. A patterned photoresist layer is formed on the polysilicon layer above the contact opening. An anisotropic etching step is performed with the photoresist layer serving as a mask until a portion of the covering layer is exposed. An oxide layer is formed on the exposed covering layer. The surface of the oxide layer is higher than the surface of the polysilicon layer. The photoresist layer is removed to expose a portion of a sidewall of the polysilicon layer. A spacer is formed on the exposed sidewall of the polysilicon layer. An anisotropic etching step is performed with the spacer and the oxide layer serving as masks to remove a portion of the polysilicon layer. The spacer and the oxide layer are removed. A hemispherical grained silicon layer is formed on the polysilicon layer. A dielectric film and a conductive layer are formed over the substrate.
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patent: 5877052 (1999-03-01), Lin
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patent: 5930621 (1999-07-01), Kang et al.
patent: 6025246 (2000-02-01), Kim
Huang Jiawei
Kennedy Jennifer M.
Niebling John F.
Patents J.C.
United Semiconductor Corp
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