Static information storage and retrieval – Read/write circuit – Precharge
Patent
1986-08-29
1987-12-29
Moffitt, James W.
Static information storage and retrieval
Read/write circuit
Precharge
365149, G11C 702, G11C 1124
Patent
active
047165499
ABSTRACT:
A semiconductor memory device capable of compensating for variation in a discriminating voltage of a memory cell comprising a memory cell and a gate circuit for coupling the memory cell to a bit line. The device has a precharge circuit for precharging the bit line pair to a predetermined resultant precharge voltage in a reset state. The precharge circuit precharges a bit line pair with the resultant precharge voltage obtained by adding a compensating voltage to a precharge voltage in the reset state. The compensating voltage is adapted to compensate for variation in a memory cell discriminating voltage based on variation in a memory cell voltage caused by capacitive coupling of a word line to a memory capacitor due to a parasitic capacitance of a gate circuit in the active state, and the precharge voltage is adapted to optimize the memory cell discriminating voltage when it is assumed that the parasitic capacitance is not present.
REFERENCES:
patent: 3946368 (1976-03-01), Chou
patent: 4195239 (1980-03-01), Suzuki
patent: 4259729 (1981-03-01), Tokushige
Kodama Nobumi
Nakano Masao
Nakano Tomio
Nozaki Shigeki
Sato Kimiaki
Fujitsu Limited
Moffitt James W.
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