Interleaved sensing system for FIFO and burst-mode memories

Details Interleaved sensing system for FIFO and burst-mode memories Interleaved sensing system for FIFO and burst-mode memories

1989-07-17

1990-09-04

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Multiplexing

36518905, 36523002, 36523008, G11C 1300

Patent

active

049549871

ABSTRACT:
An interleaved sensing system for decreasing the read access time in a sequential memory includes a sequential memory array formed of a plurality of memory cells for storing data. The memory cells are arranged in a plurality of odd columns and a plurality of even columns. Sensing means are provided for interleaving the stored data in the memory cells in the odd columns with the stored data in the memory cells in the even columns. An output buffer is coupled to the sensing means for generating data output representing alternately the stored data in the odd and even columns during alternate read cycles.

REFERENCES:
patent: 4878200 (1989-10-01), Asghar

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