Method for metal gate N/P patterning

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

Reexamination Certificate

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Details

C438S587000, C438S585000, C438S199000, C257SE21218, C257SE21231

Reexamination Certificate

active

08048810

ABSTRACT:
A method for fabricating a integrated circuit is disclosed. An exemplary method includes providing a substrate; forming a hard mask layer over the substrate; forming a patterned photoresist layer over the hard mask layer, such that portions of the hard mask layer are exposed; performing a dry etching process to remove the exposed portions of the hard mask layer; removing the patterned photoresist layer using at least one of a nitrogen plasma ashing and a hydrogen plasma ashing; and performing a wet etching process to remove remaining portions of the hard mask layer.

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