Methods of forming integrated circuits

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Diffusing a dopant

Reexamination Certificate

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C438S564000, C438S249000, C257SE21135

Reexamination Certificate

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08053344

ABSTRACT:
A method of forming an integrated circuit includes forming a gate structure over a substrate. At least one silicon-containing layer is formed in source/drain (S/D) regions adjacent to sidewalls of the gate structure. An N-type doped silicon-containing layer is formed over the at least one silicon-containing layer. The N-type doped silicon-containing layer has an N-type dopant concentration higher than that of the at least one silicon-containing layer. The N-type doped silicon-containing layer is annealed so as to drive N-type dopants of the N-type doped silicon-containing layer to the S/D regions.

REFERENCES:
patent: 2006/0234504 (2006-10-01), Bauer et al.
Fischer, P. R., et al., “Lowe Temperature Silcore Deposition of Undopted and Doped Silicon Films”, ECS Transactions, 3, (2) 203-215 (2006).

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