Efficient non-transactional write barriers for strong atomicity

Details Efficient non-transactional write barriers for strong atomicity Efficient non-transactional write barriers for strong atomicity

2007-12-30

2011-11-22

Tran, Denise (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S154000, C711SE12001

Reexamination Certificate

active

08065491

ABSTRACT:
A method and apparatus for providing optimized strong atomicity operations for non-transactional writes is herein described. Locks are acquired upon initial non-transactional writes to memory locations. The locks are maintained until an event is detected resulting in the release of the locks. As a result, in the intermediary period between acquiring and releasing the locks, any subsequent writes to memory locations that are locked are accelerated through non-execution of lock acquire operations.

REFERENCES:
patent: 2008/0163220 (2008-07-01), Wang et al.
patent: 2009/0089520 (2009-04-01), Saha et al.

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