Semiconductor device comprising NMOS and PMOS transistors...

Details Semiconductor device comprising NMOS and PMOS transistors... Semiconductor device comprising NMOS and PMOS transistors...

2007-05-15

2010-06-22

v Pham, Hoai (Department: 2892)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S218000, C257SE21632

Reexamination Certificate

active

07741167

ABSTRACT:
By forming a substantially continuous and uniform semiconductor alloy in one active region while patterning the semiconductor alloy in a second active region so as to provide a base semiconductor material in a central portion thereof, different types of strain may be induced, while, after providing a corresponding cover layer of the base semiconductor material, well-established process techniques for forming the gate dielectric may be used. In some illustrative embodiments, a substantially self-aligned process is provided in which the gate electrode may be formed on the basis of layer, which has also been used for defining the central portion of the base semiconductor material of one of the active regions. Hence, by using a single semiconductor alloy, the performance of transistors of different conductivity types may be individually enhanced.

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PCT Search Report Dated Apr. 9, 2008 for Serial No. PCT/US07/022680.
Communication from foreign associate dated Jul. 19, 2007 for Application No. 102006051492.0-33.

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