Vertical MOS transistor device with asymmetrical source and...

Details Vertical MOS transistor device with asymmetrical source and... Vertical MOS transistor device with asymmetrical source and...

2008-10-31

2010-11-30

Pert, Evan (Department: 2826)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S589000, C257SE21419

Reexamination Certificate

active

07842575

ABSTRACT:
A semiconductor device comprises a first conductive film formed downward, perpendicular to a substrate, penetrating through a first insulating film, a second conductive film formed downward along an outer wall of a second insulating film, a third insulating film formed from the bottom of the second conductive film to the top of the substrate in an area sandwiched between the first and second insulating films, contacting with at least the bottom of the second conductive film and an outer wall on a side which does not contact with the second insulating film, and a first impurity diffusion area of a first conductivity type, a second impurity diffusion area of a second conductivity type, a third impurity diffusion area of the first conductivity type and a fourth impurity diffusion area of the first conductivity type in a high concentration layered within the area sandwiched between the first and third insulating films.

REFERENCES:
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patent: 6686624 (2004-02-01), Hsu
patent: 2001/0020720 (2001-09-01), Hueting et al.
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patent: 2003-526948 (2003-09-01), None
patent: 2003-289142 (2003-10-01), None

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