Method of forming a metal-insulator-metal capacitor

Details Method of forming a metal-insulator-metal capacitor Method of forming a metal-insulator-metal capacitor

2006-12-18

2010-02-23

Chaudhari, Chandra (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21648

Reexamination Certificate

active

07666737

ABSTRACT:
A method of forming a metal-insulator-metal capacitor has the following steps. A stack dielectric structure is formed by alternately depositing a plurality of second dielectric layers and a plurality of third dielectric layers. A wet etch selectivity of the second dielectric layer relative to said third dielectric layer is of at least 5:1. An opening is formed in the stack dielectric structure, and then a wet etch process is employed to remove relatively-large portions of the second dielectric layers and relatively-small portions of the third dielectric layers to form a plurality of lateral recesses in the second dielectric layers along sidewalls of the opening. A bottom electrode layer is formed to extend along the serrate sidewalls, a capacitor dielectric layer is formed on the bottom electrode layer, and a top electrode layer is formed on the capacitor dielectric layer.

REFERENCES:
patent: 6114201 (2000-09-01), Wu
patent: 6624018 (2003-09-01), Yu et al.
patent: 6867094 (2005-03-01), Park

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