Method of fabricating a flash memory and an isolating...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S201000, C438S211000, C257S314000, C257S315000

Reexamination Certificate

active

07820510

ABSTRACT:
A method of fabricating a flash memory and an isolating structure applied to a flash memory is provided. The feature of the method lies in a T-shaped shallow trench isolation (STI). The T-shaped STI has a widened cap covering on a substrate and a tapered bottom embedded in the substrate. The widened cap of the T-shaped STI can provide a high process widow when fabricating the floating gate wings, and the product yield will thereby be increased.

REFERENCES:
patent: 5949101 (1999-09-01), Aritome
patent: 6222225 (2001-04-01), Nakamura et al.
patent: 6340611 (2002-01-01), Shimizu et al.
Shimizu, K. et al., “A novel high-density 5F2 NAND STI cell technology suitable for 256 Mbit and 1 Gbit flash memories”,Electron Devices Meeting, 1997. IEDM '97. Technical Digest., International,p. 271-274, Dec. 7-10, 1997.
Takeuchi, Y et al., A self-aligned STI process integration for low cost and highly reliable 1 Gbit flash memories, 1998 Symposium on VLSI Technology Digest of Technical Papers. Volume, Issue, Jun. 9-11, 1998 pp. 102-103, Jan. 1, 1998.

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