Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2009-11-03
2010-11-30
Lindsay, Jr., Walter L (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S303000, C257SE21173, C257SE21340
Reexamination Certificate
active
07842576
ABSTRACT:
The invention provides a method of manufacturing a semiconductor device including a non-volatile memory with high yield, and a semiconductor device manufactured by the method. A method of manufacturing a semiconductor device includes a process of forming a second side wall such that the width of the second side wall, which is formed on the side of a portion of a second gate electrode that does not face dummy gates on a drain forming region side, in a gate length direction is larger than that of the second side wall, which is formed on the side of the second gate electrode on a source forming region side, in the gate length direction, in a non-volatile memory forming region.
REFERENCES:
patent: 4343015 (1982-08-01), Baliga et al.
patent: 5112766 (1992-05-01), Fujii et al.
patent: 5834802 (1998-11-01), Takahashi et al.
patent: 5874330 (1999-02-01), Ahn
patent: 6200864 (2001-03-01), Selcuk
patent: 6261910 (2001-07-01), Ahn et al.
patent: 6492694 (2002-12-01), Noble et al.
patent: 6531359 (2003-03-01), Tempel et al.
patent: 6573169 (2003-06-01), Noble et al.
patent: 6909147 (2005-06-01), Aller et al.
patent: 6943077 (2005-09-01), Liu et al.
patent: 7060580 (2006-06-01), Cho et al.
patent: 7101763 (2006-09-01), Anderson et al.
patent: 7151706 (2006-12-01), Nakamura
patent: 7235441 (2007-06-01), Yasui et al.
patent: 7248507 (2007-07-01), Nakamura
patent: 7396713 (2008-07-01), Yang
patent: 7422949 (2008-09-01), Yu et al.
patent: 7432165 (2008-10-01), Fukuzaki et al.
patent: 2002/0014672 (2002-02-01), Noble et al.
patent: 2004/0038475 (2004-02-01), Dabral et al.
patent: 2005/0232009 (2005-10-01), Nakamura
patent: 2005/0236677 (2005-10-01), Li et al.
patent: 2005/0282320 (2005-12-01), Hasuike
patent: 2007/0051977 (2007-03-01), Saito et al.
patent: 2007/0091663 (2007-04-01), Nakamura
patent: 2010/0112770 (2010-05-01), Kubota
patent: 2005-353106 (2005-12-01), None
patent: 2006-269586 (2006-10-01), None
patent: 2007-157183 (2007-06-01), None
Lindsay, Jr. Walter L
McGinn IP Law Group PLLC
NEC Electronics Corporation
LandOfFree
Semiconductor device including first and second sidewalls... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device including first and second sidewalls..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device including first and second sidewalls... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4221082