Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-06-28
2010-11-09
Garbowski, Leigh Marie (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07831949
ABSTRACT:
To provide a method of designing a semiconductor integrated circuit with a high workability also in an increase in a scale of an LSI and an enhancement in an integration and designing a semiconductor integrated circuit system in which an unnecessary radiation is reduced and which is excellent in a heat characteristic, a reverse design flow to that in the conventional art is implemented, and a mounting substrate such as a printed-circuit board is first designed and a package substrate for mounting an LSI is designed based on a result of the design of the mounting substrate, and a layout design of the LSI to be mounted on the package substrate is then carried out.
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T. Mimura, et al., “High Density Packaging Technology”, Matsushita Technical Journal, Feb. 2006, pp. 21-24, vol. 52 No. 1.
Fujimoto Kazuhiko
Ito Mitsumi
Iwanishi Nobufusa
Nishimura Yuichi
Seko Koichi
Garbowski Leigh Marie
McDermott Will & Emery LLP
Panasonic Corporation
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