Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-02-15
2010-12-14
Chen, Jack (Department: 2893)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S229000, C438S300000, C438S592000, C438S652000, C127S070000
Reexamination Certificate
active
07851289
ABSTRACT:
A method for forming a Field Effect Transistor (FET) within a strain effect semiconductor layer is disclosed, whereby the source and drain of the FET are formed only in the strain effect silicon layer. The FET may be formed as a gate electrode of a p-channel type field effect transistor, and a gate electrode of a n-channel type field effect transistor on the silicon layer which has the strain effect through a gate insulating film. The sources and drains of p- and n-type diffusion layers are then formed in the silicon layer having the strain effect, on both sides of the gate electrode.
REFERENCES:
patent: 5155571 (1992-10-01), Wang et al.
patent: 5241197 (1993-08-01), Murakami et al.
patent: 5665616 (1997-09-01), Kimura et al.
patent: 5683924 (1997-11-01), Chan et al.
patent: 5946578 (1999-08-01), Fujii
patent: 5998807 (1999-12-01), Lustig et al.
patent: 2002/0011617 (2002-01-01), Kubo et al.
patent: 03-187269 (1991-08-01), None
patent: 07-321222 (1995-12-01), None
patent: 08-111528 (1996-04-01), None
patent: 08-213616 (1996-08-01), None
K. Ismail et al., “Electron transport properties of Si/SiGe heterostructures: Measurements and device implications”, Applied Physics Letters, vol. 63, Aug. 2, 1993, No. 5, pp. 660-662.
L. H. Jiang, “Electrical Properties of GeSi Surface- and Buried- Channel p-MOSFET's Fabricated by Ge Implantation”, IEEE Electron Devices, vol. 43, Jan. 1996, No. 1, pp. 97-103.
K. Ismail et al., “High Pole Mobility in SiGe Alloys for Device Applications”, Applied Physics Letters, vol. 64, Jun. 6, 1994, No. 23, pp. 3124-3126.
J. Welser et al., “Strain Dependence of the Performance Enhancement in Strained-Si n-MOSFETs”, Electron Devices Meeting, 1994, pp. 373-376.
Noguchi Takashi
Soneda Mitsuo
Chen Jack
Rader & Fishman & Grauer, PLLC
Sony Corporation
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