Dynamic memory refresh controller and method

Details Dynamic memory refresh controller and method Dynamic memory refresh controller and method

1995-05-01

1996-09-17

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Data refresh

36492692, G11C 700

Patent

active

055575781

ABSTRACT:
A refresh controller and method are provided which issue refresh requests to a memory as high and low priority requests based on the number of pending refresh requests to the memory. The refresh request is determined to be a high priority request when the number of pending refresh requests to the memory is greater than or equal to a predetermined threshold number and the refresh requests are issued to the memory as low priority requests when the number of pending refresh requests to the memory is less than the predetermined threshold number. As a result, the refresh controller and method ensure that the refresh requests are executed by the memory within the required refresh period while reducing the read latency to the memory.

REFERENCES:
patent: 4918645 (1990-04-01), Lagoy, Jr.
patent: 5021951 (1991-06-01), Baba
patent: 5031147 (1991-07-01), Maruyama et al.
patent: 5283885 (1994-02-01), Hollerbauer
patent: 5345574 (1994-09-01), Sakurada et al.
patent: 5345577 (1994-09-01), Chan et al.
patent: 5418920 (1995-05-01), Kuddes

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