Memory utilizing oxide-nitride nanolaminates

Details Memory utilizing oxide-nitride nanolaminates Memory utilizing oxide-nitride nanolaminates

2002-07-08

2010-12-07

Vu, Hung (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S314000, C257S324000, C257S331000

Reexamination Certificate

active

07847344

ABSTRACT:
Structures, systems and methods for transistors utilizing oxide-nitride nanolaminates are provided. One transistor embodiment includes a first source/drain region, a second source/drain region, and a channel region therebetween. A gate is separated from the channel region by a gate insulator. The gate insulator includes oxide-nitride nanolaminate layers to trap charge in potential wells formed by different electron affinities of the oxide-nitride nanolaminate layers.

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