Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-11-20
2010-11-09
Mai, Anh D (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S154000, C438S275000, C438S412000, C438S479000, C438S589000, C257SE21611
Reexamination Certificate
active
07829407
ABSTRACT:
A semiconductor device including semiconductor material having a bend and a trench feature formed at the bend, and a gate structure at least partially disposed in the trench feature. A method of fabricating a semiconductor structure including forming a semiconductor material with a trench feature over a layer, forming a gate structure at least partially in the trench feature, and bending the semiconductor material such that stress is induced in the semiconductor material in an inversion channel region of the gate structure.
REFERENCES:
patent: 6117712 (2000-09-01), Wu
patent: 6656810 (2003-12-01), Fukushima
patent: 6660598 (2003-12-01), Hanafi et al.
patent: 6677646 (2004-01-01), Ieong et al.
patent: 6717216 (2004-04-01), Doris et al.
patent: 6797579 (2004-09-01), Yoo et al.
patent: 7078722 (2006-07-01), Anderson et al.
patent: 7217602 (2007-05-01), Koh
patent: 2005/0064646 (2005-03-01), Chidambarrao et al.
patent: 2005/0106799 (2005-05-01), Doris et al.
patent: 2005/0130358 (2005-06-01), Chidambarrao et al.
patent: 2005/0142788 (2005-06-01), Chidambarrao et al.
patent: 2005/0156154 (2005-07-01), Zhu et al.
patent: 2005/0236668 (2005-10-01), Zhu et al.
patent: 2006/0091461 (2006-05-01), Chen et al.
patent: 2006/0125008 (2006-06-01), Chidambarrao et al.
patent: 2007/0069294 (2007-03-01), Chidambarrao et al.
patent: 2007/0158739 (2007-07-01), Fischetti et al.
C.L. Huang et al., LOCOS-Induced Stress Effects on Thin-Film SOI Devices. IEEE 1997, pp. 646-650.
Anderson Brent A.
Bryant Andres
Nowak Edward J.
International Business Machines - Corporation
Kotulak Richard
Mai Anh D
Roberts Mlotkowski Safran & Cole P.C.
LandOfFree
Method of fabricating a stressed MOSFET by bending SOI region does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating a stressed MOSFET by bending SOI region, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating a stressed MOSFET by bending SOI region will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4151078