Semiconductor memory device having fuse circuits and method...

Details Semiconductor memory device having fuse circuits and method... Semiconductor memory device having fuse circuits and method...

2007-11-28

2010-06-15

Le, Thong Q (Department: 2827)

Static information storage and retrieval

Read/write circuit

Having fuse element

C365S185330, C365S191000, C365S189040, C365S189090

Reexamination Certificate

active

07738309

ABSTRACT:
A non-volatile semiconductor memory device includes a read voltage generating circuit, a flash cell fuse circuit and a row decoder. The read voltage generating circuit generates a read voltage in response to a read enable signal and a trim code. The flash cell fuse circuit generates the trim code in response to a cell selection signal and a fuse word-line enable signal, the fuse word-line enable signal being activated after the read enable signal by a first delay time. The row decoder decodes the read voltage in response to a row address signal to generate a decoded read voltage, and to provide the decoded read voltage to a memory cell array.

REFERENCES:
patent: 6469884 (2002-10-01), Carpenter, Jr. et al.
patent: 6882214 (2005-04-01), Spenea et al.
patent: 7313038 (2007-12-01), Otsuka
patent: 2005/0270714 (2005-12-01), Huang et al.
patent: 2006/0028777 (2006-02-01), Chung et al.

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