Configuring flash memory

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C714S718000, C365S201000

Reexamination Certificate

active

07610528

ABSTRACT:
A system for configuring or testing memory may cycle a memory array while substantially concurrently performing other functional testing. In particular implementations, the system may configure, or cycle, a flash memory using a serial interface and test other functional units using the same serial interface substantially concurrently with cycling the flash memory. In some implementations, cycling the flash memory includes erasing and writing to the flash memory in specific patterns in order to dissipate charge that may have accumulated during a fabrication process.

REFERENCES:
patent: 5297148 (1994-03-01), Harari et al.
patent: 5761215 (1998-06-01), McCarthy et al.
patent: 6041378 (2000-03-01), Warren
patent: 6041406 (2000-03-01), Mann
patent: 6076177 (2000-06-01), Fontenot et al.
patent: 6243842 (2001-06-01), Slezak et al.
patent: 6493839 (2002-12-01), Miner
patent: 6510488 (2003-01-01), Lasser
patent: 6543019 (2003-04-01), Kniffler et al.
patent: 6754868 (2004-06-01), Bristow et al.
patent: 6876591 (2005-04-01), Gappisch et al.
patent: 6925583 (2005-08-01), Khu et al.
patent: 6948147 (2005-09-01), New et al.
patent: 7340658 (2008-03-01), Seuring
patent: 2007/0192657 (2007-08-01), Laurent et al.
Wong, Bill, “Flash Memory and MCUs: A Match Made in Heaven,” Basics of Design, A Supplement to Electronic Design/Mar. 15, 2005 (8 pages).
Cypress Semiconductor Corporation, “Using IEEE 1149.1 Boundary Scan (JTAG) With Cypress Ultra37000™ CPLDs,” Nov. 18, 1998 (11 pages).
“AVR105: Power Efficient High Endurance Parameter Storage in Flash Memory,” Rev. 2546A-AVR-09/03, 6 pages.
“AVR106: C functions for reading and writing to Flash memory,” Rev. 2575A-AVR-08/04, 10 pages.
“AVR107: Interfacing AVR serial memories,” Rev. 2595A-AVR-03/05, 22 pages.
“AVR108: Setup and Use of the LPM Instruction,” Rev. 1233B-AVR-05/02, 4 pages.
“AVR109: Self Programming,” Rev. 1644G-AVR-06/04, 11 pages.
“AVR910: In-System Programming,” Rev. 0943C-11/00, 10 pages.
“AVR911: AVR Open Source Programmer,” Rev. 2568A-AVR-07/04, 13 pages.
“8-bit AVR® with 8K Bytes In-System Programmable Flash—ATmega8—ATmega8L” 2418O-AVR-10/04, 305 pages.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Configuring flash memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Configuring flash memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Configuring flash memory will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4141336

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.