Semiconductor memory device and method for reducing cell...

Details Semiconductor memory device and method for reducing cell... Semiconductor memory device and method for reducing cell...

2007-04-24

2009-06-02

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Read/write circuit

Including signal comparison

C365S185140, C365S189160

Reexamination Certificate

active

07542356

ABSTRACT:
Embodiments of the invention provide devices or methods that include a status bit representing an inversion of stored data. New data is written to selected cells, the new data is selectively inverted, and the status bit is selectively toggled, based on a comparison between pre-existing data and new data associated with a write command. A benefit of embodiments of the invention is that fewer memory cells must be activated in many instances (when compared to conventional art approaches). Moreover, embodiments of the invention may also reduce the average amount of activation current required to write to variable resistive memory devices and other memory device types.

REFERENCES:
patent: 2005/0092746 (2005-05-01), Song et al.

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