Structure and methods for stress concentrating spacer

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S294000, C438S938000

Reexamination Certificate

active

07488659

ABSTRACT:
A stress-concentrating spacer structure is a stack of an upper gate spacer with a low Young's modulus and a lower gate spacer with a high Young's modulus. The stacked spacer structure surrounds the gate electrode. The stress-concentrating spacer structure may contact an inner gate spacer that contacts the gate electrode or may directly contact the gate electrode. The upper gate spacer deforms substantially more than the lower gate spacer. The stress generated by the stress liner is thus transmitted primarily through the lower gate spacer to the gate electrode and subsequently to the channel of the MOSFET. The efficiency of the transmission of the stress from the stress liner to the channel is thus enhanced compared to conventional MOSFETs structure with a vertically uniform composition within a spacer.

REFERENCES:
patent: 6621131 (2003-09-01), Murthy et al.
patent: 2005/0247986 (2005-11-01), Ko et al.
patent: 2006/0189053 (2006-08-01), Wang et al.

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