Semiconductor memory device having redundant memory cells

Details Semiconductor memory device having redundant memory cells Semiconductor memory device having redundant memory cells

1997-05-29

1998-08-25

Dinh, Son T.

Static information storage and retrieval

Read/write circuit

Bad bit

36523003, G11C 700

Patent

active

057989737

ABSTRACT:
In a semiconductor memory device including a plurality of memory cell blocks and a plurality of redundant memory cell arrays each corrsponding to one of the memory cell blocks, a first selecting circuit selects memory cells from the memory cell blocks. Also, a redundant selection signal generating circuit generates redundant selection signals for the redundant memory cell arrays, and a redundant selection signal encoder encodes the redundant selection signals into redundant encode signals. A second selecting circuit decodes the redundant encode signals to select redundant memory cells from the redundant memory cell arrays. Further, when one of the redundant selection signals is generated, a deactivating circuit deactivates the first selecting circuit.

REFERENCES:
patent: 5381370 (1995-01-01), Lacey et al.
patent: 5475648 (1995-12-01), Fujiwara
patent: 5502676 (1996-03-01), Pelley, III et al.
patent: 5673227 (1997-09-01), Engles et al.

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