Semiconductor structure and method of manufacture

Details Semiconductor structure and method of manufacture Semiconductor structure and method of manufacture

2007-06-12

2009-08-04

Cao, Phat X (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S229000, C257SE21630

Reexamination Certificate

active

07569446

ABSTRACT:
A complimentary metal oxide semiconductor and a method of manufacturing the same using a self-aligning process to form one of the stacks of device. The method includes depositing an oxide layer over a portion of a metal layer over an nFET region of a CMOS structure and etching the metal layer over a pFET region of the CMOS structure. The method further includes etching at the oxide layer over the nFET region and forming gate structures over the nFET region and pFET region.

REFERENCES:
patent: 6645818 (2003-11-01), Sing et al.
patent: 7067368 (2006-06-01), Fang et al.
patent: 7432567 (2008-10-01), Doris et al.
patent: 7485521 (2009-02-01), Zhu et al.

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