Semiconductor memory device with a noise filter and method...

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S189120

Reexamination Certificate

active

07606083

ABSTRACT:
A semiconductor memory device includes a memory cell array, an output buffer circuit and an input buffer circuit. The memory cell array includes a plurality of memory cells holding data. The output buffer circuit outputs data read from the memory cells. The input buffer circuit receives an address signal for the memory cells and includes a noise filter to remove noise. The filter length of the noise filter is variable according to the output capability of the data in the output buffer circuit.

REFERENCES:
patent: 5107523 (1992-04-01), Heaney et al.
patent: 5289060 (1994-02-01), Elnashar et al.
patent: 6025744 (2000-02-01), Bertolet et al.
patent: 6396758 (2002-05-01), Ikeda et al.
patent: 6542408 (2003-04-01), Roohparvar
patent: 6714479 (2004-03-01), Takahashi et al.
patent: 6809989 (2004-10-01), Takahashi et al.
patent: 7-29377 (1995-01-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor memory device with a noise filter and method... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device with a noise filter and method..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device with a noise filter and method... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4095446

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.