Method and system for protecting processors from...

Details Method and system for protecting processors from... Method and system for protecting processors from...

2008-02-19

2009-12-15

Kerveros, James C (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07634701

ABSTRACT:
A method for securing a scan test architecture by performing an authentication operation to authorize use of a protected scan chain.

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