Method of forming a stable transistor by dual source/drain...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S528000, C257SE21640

Reexamination Certificate

active

07452780

ABSTRACT:
A method of forming a transistor includes: forming a gate oxide layer and a gate polysilicon layer on a silicon substrate; forming low-energy ion implantation regions in the silicon substrate and in alignment with both sidewalls of the gate polysilicon layer; forming gate spacers on both sidewalls of the gate polysilicon layer; forming amorphous layers on surfaces of the gate polysilicon layer and the silicon substrate by implanting impurities at a low implantation energy into the gate polysilicon layer and the silicon substrate; and forming high-energy ion implantation regions by implanting source/drain impurities at a high implantation energy into the silicon substrate including the gate polysilicon layer and the amorphous layer.

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patent: 6037204 (2000-03-01), Chang et al.
patent: 6221744 (2001-04-01), Shih et al.
patent: 6335253 (2002-01-01), Chong et al.
patent: 6372591 (2002-04-01), Mineji et al.
patent: 6624037 (2003-09-01), Buynoski et al.

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