Semiconductor memory device having capacitors and method for...

Details Semiconductor memory device having capacitors and method for... Semiconductor memory device having capacitors and method for...

2005-04-13

2008-11-11

Baumeister, Bradley W. (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S296000, C257S309000, C257S306000, C257SE27005, C257SE27115, C257SE27116, C257SE29001, C438S014000

Reexamination Certificate

active

07449740

ABSTRACT:
A semiconductor substrate has a cell region and a peripheral circuit region surrounding the cell region. In the cell region a plurality of lower electrodes are connected to a conductive region of the semiconductor substrate, and are arrayed along row and column directions. A dielectric layer is formed on the plurality of lower electrodes. An upper electrode is formed on the dielectric layer, entirely covering the cell region, and is formed extending to a portion of the peripheral circuit region that has a step coverage lower by a height of the lower electrode than the cell region. An edge of the upper electrode has square-shaped projections that are distanced from each other at a uniform interval and are repetitively arrayed. With the described structure, pattern defects can be sensed and controlled, preventing and substantially reducing process defect.

REFERENCES:
patent: 5017514 (1991-05-01), Nishimoto
patent: 5457334 (1995-10-01), Nishimoto
patent: 6011286 (2000-01-01), Wu
patent: 6279147 (2001-08-01), Buynoski et al.
patent: 6319791 (2001-11-01), Ando
patent: 6586308 (2003-07-01), Kling et al.

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