Solder deposition method and solder bump forming method

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S613000

Reexamination Certificate

active

07452797

ABSTRACT:
The present invention provides a solder deposition method that includes the step of forming a dam around an electrode on a substrate, the step of applying a solder precipitating composition to the substrate, and the step of depositing solder on the surface of the electrode while heating the solder precipitating composition applied. This solder deposition method is suitable for forming large bumps at fine pitches. In particular, it is capable of depositing solder in a desired height precisely and easily, and yet preventing occurrence of voids.

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Office Action from Japanese Patent Office dated May 2, 2006.
Seiki Sakuyama, “Solder Bumping Technology for Wafer-scale Packaging”, 7thSymposium on “Microjoining and Assembly Technology in Electronics”, Feb. 1-2, 2001, pp. 285-290.

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