Method of manufacturing semiconductor device having improved...

Details Method of manufacturing semiconductor device having improved... Method of manufacturing semiconductor device having improved...

2007-09-06

2008-10-21

Gurley, Lynne A. (Department: 2811)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S018000, C257S048000

Reexamination Certificate

active

07439122

ABSTRACT:
A p impurity region (3) defines a RESURF isolation region in an n−semiconductor layer (2). A trench isolation structure (8a) and the p impurity region (3) together define a trench isolation region in the n−semiconductor layer (2) in the RESURF isolation region. An nMOS transistor (103) is provided in the trench isolation region. A control circuit is provided in the RESURF isolation region excluding the trench isolation region. An n+buried impurity region (4) is provided at the interface between the n−semiconductor layer (2) and a p−semiconductor substrate (1), and under an n+impurity region7connected to a drain electrode (14) of the nMOS transistor (103).

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