Methods of fabricating integrated circuit devices having...

Details Methods of fabricating integrated circuit devices having... Methods of fabricating integrated circuit devices having...

2006-03-15

2008-08-12

Ngo, Ngan (Department: 2818)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S618000, C438S622000, C438S639000, C257SE21507, C257SE21538

Reexamination Certificate

active

07410892

ABSTRACT:
An integrated circuit device, e.g., a memory device, includes a substrate, a first insulation layer on the substrate, and a contact pad disposed in the first insulation layer in direct contact with the substrate. A second insulation layer is disposed on the first insulation layer. A conductive pattern, e.g., a damascene bit line, is disposed in the second insulation layer. A conductive plug extends through the second insulation layer to contact the contact pad and is self-aligned to the conductive pattern. An insulation film may separate the conductive pattern and the conductive plug. A glue layer may be disposed between the conductive pattern and the second insulation layer. The device may further include a third insulation layer on the second insulation layer and the conductive pattern, and the conductive plug may extend through the second and third insulation layers.

REFERENCES:
patent: 6291335 (2001-09-01), Schnabel et al.
patent: 6344389 (2002-02-01), Bronner et al.
patent: 2007/0012991 (2007-01-01), Yaegashi
patent: 10-027889 (1998-01-01), None
patent: 10027889 (1999-03-01), None
patent: 1020000027544 (2000-05-01), None
patent: 1020010059019 (2001-07-01), None
patent: 1020010076166 (2001-08-01), None
Office Action, Korean Application No. 10-2003-0009926, Feb. 21, 2005.

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