Redundant wordline deactivation scheme

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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C365S185090, C365S185230, C365S185250

Reexamination Certificate

active

07405986

ABSTRACT:
A method and apparatus for reducing power consumption of a memory device. The method includes initiating a precharge operation. The precharge operation includes driving one or more bitlines to a precharge voltage. The method also includes identifying one or more defective wordlines and, during the precharge operation, driving the identified defective word lines to the precharge voltage.

REFERENCES:
patent: 5276360 (1994-01-01), Fujima
patent: 5315551 (1994-05-01), Hirayama
patent: 5555212 (1996-09-01), Toshiaki et al.
patent: 5568433 (1996-10-01), Kumar
patent: 5689469 (1997-11-01), Asaka et al.
patent: 5963489 (1999-10-01), Kirihata et al.
patent: 6219286 (2001-04-01), Fuchigami et al.
patent: 6831869 (2004-12-01), Yamano

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