Targets for measurements in semiconductor devices

Details Targets for measurements in semiconductor devices Targets for measurements in semiconductor devices

2008-09-23

2008-09-23

Louie, Wai-Sing (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

C257SE21521

Reexamination Certificate

active

11119029

ABSTRACT:
Targets or test structures used for measurements in semiconductor devices having long lines exceeding design rule limitations are divided into segments. In one embodiment, the segments have periodicity in a direction parallel to the length of the lines. In another embodiment, the segments of test structures in adjacent lines do not have periodicity in a direction parallel to the length of the lines. The lack of periodicity is achieved by staggering segments of substantially equal lengths in adjacent lines, or by dividing the lines into segments having unequal lengths. The test structures may be formed in scribe line regions or die regions of a semiconductor wafer.

REFERENCES:
patent: 6822260 (2004-11-01), Nariman et al.
patent: 2005/0089775 (2005-04-01), Archie et al.
Niu, X., “Specular Spectroscopic Scatterometry in DUV Lithography,” Metrology, Inspection, and Process Control for Microlithography XIII, 1999, pp. 159-168, SPIE Proceedings, vol. 3677, Paper No. 3677-18, SPIE—The International Society for Optical Engineering, Bellingham, WA.

Affiliated with

Also associated with

Rating

Targets for measurements in semiconductor devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Targets for measurements in semiconductor devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Targets for measurements in semiconductor devices will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3941036