Method of fabricating recess channel array transistor

Details Method of fabricating recess channel array transistor Method of fabricating recess channel array transistor

2008-04-22

2008-04-22

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having junction gate

C438S589000, C257SE21655

Reexamination Certificate

active

10969751

ABSTRACT:
A method of fabricating a recess channel array transistor is disclosed. An impurity region is formed in a semiconductor substrate. Then, a polysilicon layer is formed on the semiconductor substrate, both of which are then etched to form a trench that defines an active region. By filling the trench with an insulating material, a STI and an interlayer insulating layer are formed. A patterned mask layer is formed to be used for etching the polysilicon layer and the interlayer insulating layer, thereby forming an opening that defines a contact pad. A Spacer is formed along a sidewall of the contact pad. Using the mask layer and the spacer, the semiconductor substrate is etched to thereby form a recess channel trench. Thereafter, a gate insulating layer and a gate conductive layer are formed. A nitride layer is formed on the resultant structure, and chemical mechanical polishing is performed to isolate the nodes.

REFERENCES:
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patent: 2003-0048894 (2003-06-01), None
English language abstract of Korean Publication No. 2003-0048894.

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