Method for reduction of reverse short channel effect in MOSFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438217, 438308, H01L 21336

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active

057926999

ABSTRACT:
This invention describes a manufacturing method for MOSFET devices that are free from reverse short channel effect usually found in such devices made by prior art processes. In contrast to the prior art process sequence, the channel implant is made after the source and drain already formed by implantation and its damage already annealed out. The enhanced diffusion of the channel implant, caused by damage generated point defects and responsible for the reverse short channel effect, is therefore avoided. The channel implantation uses high energy ions to penetrate through the polysilicon gate, forming a threshold voltage adjustment and punch-through barrier layer under the gate. The channel implant through the source/drain regions is deeper than the source/drain junctions so that the junction capacitance is reduced in comparison with the prior art.

REFERENCES:
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patent: 5571745 (1996-11-01), Horiuchi
patent: 5618743 (1997-04-01), Williams et al.
Nishi et al, "Evidence of Channel Profile Modification Due To Implantation Damage Studied By A New Method, And Its Implication To Reverse Short Channel Effects of NMOSFETs", IEDM Tech. Digest, 1995, p. 993.
Orlowski et al, "Submicron Short Channel Effects Due To Gate Reoxidation Induced Lateral Interstatial Diffusion", IEDM Tech. Digest, p. 632, 1987.
Refferty et al, "Explanation of Reverse Short Channel Effect By Defect Gradients", IEDM Tech. Digest, 1993, p. 311.
Crowder et al, "The Effect Of Source/Drain Processing On The Reverse Short Channel Effect Of Deep Sub-Micron Bult And SOI NMOSFETs", IEDM Tech Dig p. 427, 1995.

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