Method of fabricating a twin hammer tree shaped capacitor struct

Details Method of fabricating a twin hammer tree shaped capacitor struct Method of fabricating a twin hammer tree shaped capacitor struct

1997-08-18

1998-08-11

Chang, Joni

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438254, 438397, H01L 218242, H01L 2120

Patent

active

057926921

ABSTRACT:
A process for fabricating a large surface area, storage node structure, for a DRAM device, has been developed. The storage node structure is comprised of a lower level polysilicon structure, exhibiting a "twin hammer tree" shape, and connected to an upper polysilicon level, exhibiting a "branch" type shape. The fabrication process used to create this storage node structure, features various deposition procedures, used for insulator and polysilicon layers, and various anisotropic and isotropic, dry etch procedures, as well as wet etch procedures, used for creation of the "twin hammer tree" shaped structure.

REFERENCES:
patent: 5137842 (1992-08-01), Chan et al.
patent: 5554557 (1996-09-01), Koh
patent: 5583069 (1996-12-01), Ahn et al.
patent: 5700731 (1997-12-01), Lin et al.

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