Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-12-04
2007-12-04
Britt, Cynthia (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
11158524
ABSTRACT:
Testing signal propagation delay of a shift register circuit is described. A ring oscillator has a first sequential element, a second sequential element, and a shift register circuit. The shift register circuit is coupled in series between the first sequential element and the second sequential element. The shift register circuit includes the at least one shift register and combinational logic coupled to the at least one shift register. The at least one shift register is configured to store a test data pattern of alternating logic ones and zeros. The combinational logic is coupled to receive a data signal from the first sequential element of the ring oscillator and coupled to receive a shift output signal from the at least one shift register. The combinational logic is configured to provide an exclusive logic function.
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Duce Richard D. J.
Verma Himanshu J.
Britt Cynthia
Guerrier Merant
Webostad W. Eric
Xilinx , Inc.
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