Semiconductor device and manufacturing method thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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C257SE21114

Reexamination Certificate

active

11075421

ABSTRACT:
According to one aspect of the present invention, a semiconductor device, comprising a wiring board provided with wires and electrodes; a semiconductor element which is mounted on the wiring board and has plural connection electrodes formed on its surface; and a metal layer of fine metal particles aggregated and bonded which is interposed between the electrodes on the wiring board and the connection electrodes of the semiconductor element to connect between the electrodes and the connection electrodes, is provided.

REFERENCES:
patent: 6303407 (2001-10-01), Hotchkiss et al.
patent: 2003/0045016 (2003-03-01), Saito et al.
patent: 2004/0009303 (2004-01-01), Ito et al.
patent: 2004/0087068 (2004-05-01), Yudasaka
patent: 2004/0106232 (2004-06-01), Sakuyama et al.
patent: 2004/0124418 (2004-07-01), Yamazaki et al.
patent: 2004/0135830 (2004-07-01), Kamiyama et al.
patent: 2005/0029591 (2005-02-01), Yudasaka et al.
patent: 2005/0170076 (2005-08-01), Seki et al.
patent: 2006/0006405 (2006-01-01), Mazzochette
patent: 7-114218 (1995-05-01), None
patent: 7-211721 (1995-08-01), None
patent: 3283977 (2002-03-01), None
JEDEC Publication 95, Design Guide 4.5: “Fine-pitch, Square Ball Grid Array Package (FBGA)”, dated Jan. 2003.

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