Method of manufacturing semiconductor device that includes...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S639000, C257SE21577

Reexamination Certificate

active

10957305

ABSTRACT:
According to some embodiments, a gate electrode structure including a gate electrode stack and a spacer, and source/drain region are formed on a semiconductor substrate. A first interlayer insulating layer having a thickness greater than that of the gate electrode structure is formed on the semiconductor substrate. On the first interlayer insulating layer, an etch inducing and focusing mask extending in a same direction as a length direction of the gate electrode structure and covering the gate electrode structure is formed. A second interlayer insulating layer is formed on the first interlayer insulating layer. A photoresist pattern is formed on the second interlayer insulating layer. The second interlayer insulating layer and the first interlayer insulating layer are sequentially etched using the photoresist pattern as an etch mask, thereby forming a SAC hole. A conductive material is used to fill in the SAC hole to form a SAC pad.

REFERENCES:
patent: 6265296 (2001-07-01), Yen et al.
patent: 6287957 (2001-09-01), Linliu
patent: 6465294 (2002-10-01), Tsai et al.
patent: 1997-0057914 (1997-11-01), None
English language abstract ofKorean Application No. 1997-0057914.

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